Cutting edge research at the intersection of quantum technologies and hardware security

QUBITECH is also exploring hybrid quantum-safe architectures that combine traditional cryptography, post-quantum cryptographic primitives, and PUF-based security schemes. These hybrid systems offer flexibility and modularity, allowing secure key management and authentication across heterogeneous quantum and classical infrastructures. This approach supports the deployment of scalable, long-range QKD networks, enabling interoperability and enhancing resilience against both classical and quantum adversaries.

Through the integration of SRAM-based Physical Unclonable Functions (PUFs), QUBITECH has developed a hardware-rooted authentication mechanism for QKD nodes. This solution eliminates the need for externally stored secrets and ensures strong, tamper-resistant identity verification across distributed quantum communication infrastructures. Developed in the context of the HellasQCI project, the authenticator is designed for seamless integration with commercial QKD platforms, reinforcing the trust model of operational quantum networks.

QUBITECH’s hardware security technologies also include lightweight, dynamically adjustable trust anchors that are a cost-efficient, dynamically adjustable PUF-based solution. They can be connected externally with any edge and far-edge existing IoT device/platform, enabling verifiable computing and a secure lifecycle management of such resource-constrained devices.

Development of SRAM-based and photonic PUFs as hardware-based Roots-of-Trust for secure authentication and key generation in resource-constrained environments (edge and far-edge IoT devices) as well as for centralized key management and distribution. These PUFs, implemented in both SRAM-based and photonic architectures, serve as secure roots-of-trust for resource-constrained devices such as IoT nodes and embedded systems. They are used for device identification, secure key provisioning, and protection against cloning or tampering.

This includes lattice-based key encapsulation mechanisms (KEMs) and digital signature schemes, such as Kyber and Dilithium, that are being implemented in hardware-secure modules to extend support for protocols like PQ-TLS.

Our research emphasizes on the co-design and implementation of post-quantum cryptographic (PQC) algorithms in both hardware and software, ensuring secure and efficient integration into real-world systems. Additionally, Qubitech designs and implements HW/SW quantum-resistant cryptographic primitives and hardware secure elements towards safeguarding future communication infrastructures.

QUBITECH designs and develops novel optimization algorithms inspired by principles from quantum mechanics and complex physical systems. These quantum- and physics-inspired algorithms are tailored for both discrete and continuous optimization problems, delivering energy-efficient, high-performance solutions.

The computational framework draws from gain-dissipative models and physics-inspired neural networks, which mimic the dynamics of physical systems to achieve efficient convergence in large-scale problem spaces. By leveraging GPU-accelerated architectures, these methods enable rapid and scalable optimization, suitable for combinatorial problem-solving and machine learning applications alike.

In parallel, QUBITECH is advancing a dedicated Quantum Machine Learning (QML) framework that supports the algorithmic exploration, simulation, and benchmarking of hybrid and fully quantum learning models. This platform allows researchers to` investigate near-term and future quantum-enhanced ML algorithms on both classical and emerging quantum hardware

Together, these approaches form a unified research direction where physical principles directly inform algorithm design, accelerating discovery in optimization, data analysis, and intelligent systems

QUBITECH is actively developing a gate-based quantum computing emulator designed to run on classical hardware platforms. This emulator provides a practical and scalable environment for designing, testing, and validating quantum algorithms—well ahead of widespread access to physical quantum processors. The emulator supports a broad set of quantum operations and is optimized to leverage modern computing architectures such as GPUs and multicore CPUs, significantly improving performance in simulating complex quantum circuits. Designed for flexibility, it accommodates both standalone and hybrid quantum-classical workflows, making it an ideal tool for researchers and developers aiming to prototype and benchmark quantum algorithms within a classical infrastructure. This tool plays a foundational role in QUBITECH’s strategy to bridge the gap between theoretical quantum computing and real-world implementation, enabling the exploration of quantum software stacks and accelerating algorithmic innovation across application domains.

QUBITECH has developed a Spatial Photonic Ising Machine (SPIM), a quantum-inspired analog computing platform that encodes spin variables and their pairwise interactions into the phase profile of a laser beam using a Spatial Light Modulator (SLM). The resulting optical field is processed and analyzed to evaluate the energy landscape of the Ising Hamiltonian. By combining holographic encoding techniques with iterative feedback and physics-inspired heuristics, the SPIM efficiently searches for low-energy configurations corresponding to optimal or near-optimal solutions to NP-hard combinatorial problems.